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:: GENERAL SPECIFICATION ::
 
INTEL PENTIUM 4
 
SOCKET 423
SOCKET 478
LGA 775
 Code name
Williamate
Northwood A
Northwood B
Northwood C
Prescott D
Prescott E
*Prescott E
Prescott F
 Manufactiromg Process
0.18 µm
0.18 µm
0.13 µm
0.13 µm
0.09 µm
0.09 µm
0.09 µm
0.09 µm
 Front Side Bus
400 MHz
400 MHz
533 MHz
800 MHz
533 / 800 MHz
800 MHz
800 MHz
800 MHz
 L1 instruction cache
12K µOps
12K µOps
12K µOps
12K µOps
12K µOps
12K µOps
12K µOps
12K µOps
 L1 data cache
8 KB
8 KB
8 KB
8 KB
16 KB
16 KB
16 KB
16 KB
 L2 cache
256 KB
512 KB
512 KB
512 KB
1024 KB
1024 KB
1024 KB
2048 KB
 SSE / SSE2 / SSE3
Yes / Yes / No
Yes / Yes / No
Yes / Yes / No
Yes / Yes / No
Yes / Yes / Yes
Yes / Yes / Yes
Yes / Yes / Yes
Yes / Yes / Yes
 Hyper-Threading
No
No
No
Yes
*Yes
Yes
Yes
Yes
 EMT-64
No
No
No
No
No
No
Yes
Yes
 Execution Disable Bit
No
No
No
No
No
*No
Yes
Yes
 EIST
No
No
No
No
No
No
No
Yes
 Model Number & Clock
1.30GHz
1.40GHz
1.50GHz
1.60GHz
1.70GHz
1.80GHz
2.00GHz
2.20GHz
2.40GHz
2.60GHz
2.26GHz
2.40GHz
2.53GHz
2.66GHz
2.80GHz
3.06GHz
2.40GHz
2.60GHz
2.80GHz
3.00GHz
3.20GHz
2.40A GHz
2.80A GHz
2.80E GHz
3.00E GHz
3.20E GHz
3.40E GHz
520 (2.8GHz)
530 (3.0GHz)
540 (3.2GHz)
550 (3.4GHz)
560 (3.6GHz)
570 (3.8GHz)
521 (2.8GHz)
531 (3.0GHz)
541 (3.2GHz)
551 (3.4GHz)
561 (3.6GHz)
571 (3.8GHz)
630 (3.0GHz)
640 (3.2GHz)
650 (3.4GHz)
660 (3.6GHz)
670 (3.8GHz)
 Chipset (Intel only)
850 (RD)
845 (SD)
845 (DDR)
845E (DDR)
865 (DDR)
848 (DDR)
865 (DDR)
875 (DDR)
848 (DDR)
865 (DDR)
875 (DDR)
915 (DDR2)
925 (DDR2)
915 (DDR2)
925 (DDR2)
915 (DDR2)
925 (DDR2)
 Graphic Interface
AGP
AGP
AGP
AGP
AGP
PCI-e
PCI-e
PCI-e

*  Code name marked in GREY means no longer in production
* Prescott D: HT enabled for 800MHz FSB only. 2.40A and 2.80A uses 533MHz FSB.
* Prescott E: No difference between 5x0 and 5x1 series, except 5x1 supports EMT64.
* Model number with 'J' as suffix, for example 520J, supports Execution Disable




AMD ATHLON 64
SOCKET 754
SOCKET 939
 Code name
Newcastle
Clawhammer
Newcastle
Winchester
Venice
Sledgehammer
San Diego
 Manufactiromg Process
0.13 µm
0.13 µm
0.13 µm
0.09 µm
0.09 µm
0.13 µm
0.09 µm
 Hyper Transport Bus
1600 MHz
1600 MHz
2000 MHz
2000 MHz
2000 MHz
2000 MHz
2000 MHz
 Memory Interface
single
single
dual
dual
dual
dual
dual
 L1 instruction cache
64 KB
64 KB
64 KB
64 KB
64 KB
64 KB
64 KB
 L1 data cache
64 KB
64 KB
64 KB
64 KB
64 KB
64 KB
64 KB
 L2 cache
512 KB
1024 KB
512 KB
512 KB
512 KB
1024 KB
1024 KB
 SSE / SSE2 / SSE3
Yes / Yes / No
Yes / Yes / No
Yes / Yes / No
Yes / Yes / No
Yes / Yes / Yes
Yes / Yes / No
Yes / Yes / Yes
 3D Now / 3D Now Pro
Yes / Yes
Yes / Yes
Yes / Yes
Yes / Yes
Yes / Yes
Yes / Yes
Yes / Yes
 x86-64 (AMD64)
Yes
Yes
Yes
Yes
Yes
Yes
Yes
 NX-bit (Non-eXecutable)
Yes
Yes
Yes
Yes
Yes
Yes
Yes
 Cool n' Quiet
Yes
Yes
Yes
Yes
Yes
Yes
Yes
 On die memory controller
Yes
Yes
Yes
Yes
Yes
Yes
Yes
 Model Number & Clock
2800+ (1.8GHz)
3000+ (2.0GHz)
3200+ (2.2GHz)
3200+ (2.0GHz)
3400+ (2.2GHz)
3700+ (2.4GHz)
3500+ (2.2GHz)
3800+ (2.4GHz)
3000+ (1.8GHz)
3200+ (2.0GHz)
3500+ (2.2GHz)
3000+ (1.8GHz)
3200+ (2.0GHz)
3500+ (2.2GHz)
3800+ (2.4GHz)
FX-51 (2.2GHz)
FX-53 (2.4GHz)
FX-55 (2.6GHz)
4000+ (2.4GHz)
3700+ (2.2GHz)
4000+ (2.4GHz)
FX-57 (2.8GHz)
* FX-59 (3.0GHz)
 Chipset (nVidia only)
nForce3 150
nForce 3 250
nForce3 150
nForce 3 250
nForce3 250
nForce4 Ultra
nForce4 SLi
nForce3 250
nForce4 Ultra
nForce4 SLi
nForce3 250
nForce4 Ultra
nForce4 SLi
nForce3 250
nForce4 Ultra
nForce4 SLi
nForce3 250
nForce4 Ultra
nForce4 SLi
 Graphic Interface
AGP
AGP
AGP / PCI-e
AGP / PCI-e
AGP / PCI-e
AGP / PCI-e
AGP / PCI-e

*  Code name marked in GREY means no longer in production
* FX-59: A higher clocked FX-57, not in production yet.
* nForce 3 uses AGP and nForce4 uses PCI-e
* Venice or San Diego core has improved memory controller compare to other cores.
* Venice or San Diego uses DSL which enabled the chips to clock higher than other cores.
DISCUSS GENERAL SPECIFICATION HERE or HERE
 

Copyright © 2005 Chan Yee Yong a.k.a. charge-n-go

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